Renesas Electronics 85102AGILF Clock Buffer, 16-Pin 7 TSSOP
- RS-stocknr.:
- 216-6207
- Fabrikantnummer:
- 85102AGILF
- Fabrikant:
- Renesas Electronics
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We weten niet of dit item nog op voorraad komt, RS is van plan dit binnenkort uit ons assortiment te halen.
- RS-stocknr.:
- 216-6207
- Fabrikantnummer:
- 85102AGILF
- Fabrikant:
- Renesas Electronics
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
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Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Minimum Supply Voltage | 3V | |
| Pin Count | 16 | |
| Maximum Supply Voltage | 3.3V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Width | 4.4 mm | |
| Series | 85102A | |
| Height | 1mm | |
| Standards/Approvals | No | |
| Length | 5mm | |
| Number of Outputs | 7 | |
| Automotive Standard | No | |
| Maximum Output Frequency | 200MHz | |
| Alles selecteren | ||
|---|---|---|
Merk Renesas Electronics | ||
Product Type Clock Buffer | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Minimum Supply Voltage 3V | ||
Pin Count 16 | ||
Maximum Supply Voltage 3.3V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Width 4.4 mm | ||
Series 85102A | ||
Height 1mm | ||
Standards/Approvals No | ||
Length 5mm | ||
Number of Outputs 7 | ||
Automotive Standard No | ||
Maximum Output Frequency 200MHz | ||
The Renesas Electronics 85102I is a low skew, high performance 1-to-2 Differential-to-HCSL fanout buffer. The 85102I has a differential clock input. The CLK0, nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/ deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defi ned performance and repeatability.
Two 0.7V differential HCSL outputs
Selectable differential CLK0, nCLK0 or LVCMOS inputs
CLK0, nCLK0 pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, HCSL
CLK1 can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 500MHz
Translates any single-ended input signal to 3.3V
HCSL levels with resistor bias on nCLK input
Output skew: 65ps (maximum)
Part-to-part skew: 600ps (maximum)
Propagation delay: 3.2ns (maximum)
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