Winbond W972GG6KB25I SDRAM 2 GB Surface, Surface Mount, 84-Pin 16 bit WBGA

RS-stocknr.:: 188-2835
Fabrikantnummer:: W972GG6KB25I
Fabrikant:: Winbond

Winbond W972GG6KB25I SDRAM 2 GB Surface, Surface Mount, 84-Pin 16 bit WBGA

Bulkkorting beschikbaar

Subtotaal (1 eenheid)*

€ 11,56

(excl. BTW)

€ 13,99

(incl. BTW)

Informatie over voorraden is momenteel niet toegankelijk - Controleer het later nog eens opnieuw

Aantal stuks	Per stuk
1 - 9	€ 11,56
10 - 24	€ 11,23
25 - 49	€ 10,96
50 - 99	€ 10,67
100 +	€ 10,39

*prijsindicatie

RS-stocknr.:: 188-2835
Fabrikantnummer:: W972GG6KB25I
Fabrikant:: Winbond

Specificaties

Datasheets

Wetgeving en conformiteit

Productomschrijving

Zoek vergelijkbare producten door een of meer kenmerken te selecteren.

Alles selecteren	Attribuut	Waarde
	Merk	Winbond
	Product Type	SDRAM
	Memory Size	2GB
	Organisation	256M x 8 Bit
	Data Bus Width	16bit
	Address Bus Width	17bit
	Number of Bits per Word	8
	Maximum Clock Frequency	533MHz
	Maximum Random Access Time	0.4ns
	Number of Words	256M
	Mount Type	Surface, Surface Mount
	Package Type	WBGA
	Minimum Operating Temperature	-40°C
	Pin Count	84
	Maximum Operating Temperature	95°C
	Height	0.6mm
	Length	12.6mm
	Standards/Approvals	RoHS
	Series	W972GG6KB
	Width	8.1 mm
	Supply Current	280mA
	Maximum Supply Voltage	1.9V
	Minimum Supply Voltage	1.7V
	Automotive Standard	No

	Alles selecteren
	Merk Winbond
	Product Type SDRAM
	Memory Size 2GB
	Organisation 256M x 8 Bit
	Data Bus Width 16bit
	Address Bus Width 17bit
	Number of Bits per Word 8
	Maximum Clock Frequency 533MHz
	Maximum Random Access Time 0.4ns
	Number of Words 256M
	Mount Type Surface, Surface Mount
	Package Type WBGA
	Minimum Operating Temperature -40°C
	Pin Count 84
	Maximum Operating Temperature 95°C
	Height 0.6mm
	Length 12.6mm
	Standards/Approvals RoHS
	Series W972GG6KB
	Width 8.1 mm
	Supply Current 280mA
	Maximum Supply Voltage 1.9V
	Minimum Supply Voltage 1.7V
	Automotive Standard No

Datasheet W972GG6KB25I

The W972GG6KB is a 2G bits DDR2 SDRAM, and speed involving -18, -25/25I, and -3/-3I.

Double Data Rate architecture: two data transfers per clock cycle

CAS Latency: 3, 4, 5, 6 and 7

Burst Length: 4 and 8

Bi-directional, differential data strobes (DQS and /DQS ) are transmitted / received with data

Edge-aligned with Read data and center-aligned with Write data

DLL aligns DQ and DQS transitions with clock

Differential clock inputs (CLK and /CLK)

Data masks (DM) for write data

Commands entered on each positive CLK edge, data and data mask are referenced to both edges of /DQS

Posted /CAS programmable additive latency supported to make command and data bus efficiency

Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)

Off-Chip-Driver impedance adjustment (OCD) and On-Die-Termination (ODT) for better signal quality

Auto-precharge operation for read and write bursts

Auto Refresh and Self Refresh modes

Precharged Power Down and Active Power Down

Write Data Mask

Write Latency = Read Latency - 1 (WL = RL - 1)

Interface: SSTL_18

Winbond W972GG6KB25I SDRAM 2 GB Surface, Surface Mount, 84-Pin 16 bit WBGA

Gerelateerde Links