Intelligent Memory IM2G16D2DBBG-25I, SDRAM 2GBit Surface Mount, 400MHz, 84-Pin 84-ball FBGA
- RS-stocknr.:
- 588-596
- Fabrikantnummer:
- IM2G16D2DBBG-25I
- Fabrikant:
- Intelligent Memory
Subtotaal (1 eenheid)*
€ 9,77
(excl. BTW)
€ 11,82
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Op voorraad
- 50 stuk(s) klaar voor verzending vanaf een andere locatie
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk |
|---|---|
| 1 + | € 9,77 |
*prijsindicatie
- RS-stocknr.:
- 588-596
- Fabrikantnummer:
- IM2G16D2DBBG-25I
- Fabrikant:
- Intelligent Memory
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Intelligent Memory | |
| Memory Size | 2GBit | |
| SDRAM Class | DDR2 | |
| Organisation | 256M x 8 | |
| Data Rate | 400MHz | |
| Data Bus Width | 16bit | |
| Maximum Random Access Time | 2.5ns | |
| Mounting Type | Surface Mount | |
| Package Type | 84-ball FBGA | |
| Pin Count | 84 | |
| Maximum Operating Supply Voltage | 1.9 V | |
| Minimum Operating Temperature | -40 °C | |
| Minimum Operating Supply Voltage | 1.7 V | |
| Maximum Operating Temperature | 95 °C | |
| Alles selecteren | ||
|---|---|---|
Merk Intelligent Memory | ||
Memory Size 2GBit | ||
SDRAM Class DDR2 | ||
Organisation 256M x 8 | ||
Data Rate 400MHz | ||
Data Bus Width 16bit | ||
Maximum Random Access Time 2.5ns | ||
Mounting Type Surface Mount | ||
Package Type 84-ball FBGA | ||
Pin Count 84 | ||
Maximum Operating Supply Voltage 1.9 V | ||
Minimum Operating Temperature -40 °C | ||
Minimum Operating Supply Voltage 1.7 V | ||
Maximum Operating Temperature 95 °C | ||
The Intelligent Memory DDR DRAM achieves high-speed data transfer rates by employing a chip architecture that prefetches multiple bits and synchronizes the output data to a system clock. It supports system frequencies up to 533 MHz, enabling fast and efficient performance. The design includes internal banks for concurrent operation and utilizes a 4-bit prefetch architecture to boost data throughput.
RoHS compliant
PASR partial array self refresh
Auto refresh and self refresh
PASR partial array self refresh
Auto refresh and self refresh
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