Nexperia 74HC574PW,118 1 Flip Flop IC 74HC, 3 State, 20-Pin TSSOP
- RS-stocknr.:
- 170-5409
- Fabrikantnummer:
- 74HC574PW,118
- Fabrikant:
- Nexperia
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|---|---|---|---|
| 50 - 50 | € 0,258 | € 12,90 | - |
| 100 - 200 | € 0,155 | € 7,75 | 39% |
| 250 - 450 | € 0,148 | € 7,40 | 42% |
| 500 - 1200 | € 0,139 | € 6,95 | 46% |
| 1250 + | € 0,124 | € 6,20 | 51% |
*prijsindicatie
- RS-stocknr.:
- 170-5409
- Fabrikantnummer:
- 74HC574PW,118
- Fabrikant:
- Nexperia
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Nexperia | |
| Logic Family | 74HC | |
| Product Type | Flip Flop IC | |
| Input Type | CMOS | |
| Output Type | 3 State | |
| Clock Frequency | 24MHz | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Package Type | TSSOP | |
| Minimum Supply Voltage | 2V | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 6V | |
| Trigger Type | Positive Edge | |
| Flip-Flop Type | D Flip-Flop | |
| Maximum Propagation Delay Time @ CL | 38ns | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 125°C | |
| Number of Elements per Chip | 1 | |
| Length | 6.6mm | |
| Standards/Approvals | No | |
| Height | 950μm | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Nexperia | ||
Logic Family 74HC | ||
Product Type Flip Flop IC | ||
Input Type CMOS | ||
Output Type 3 State | ||
Clock Frequency 24MHz | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Package Type TSSOP | ||
Minimum Supply Voltage 2V | ||
Pin Count 20 | ||
Maximum Supply Voltage 6V | ||
Trigger Type Positive Edge | ||
Flip-Flop Type D Flip-Flop | ||
Maximum Propagation Delay Time @ CL 38ns | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 125°C | ||
Number of Elements per Chip 1 | ||
Length 6.6mm | ||
Standards/Approvals No | ||
Height 950μm | ||
Automotive Standard No | ||
The 74HC574: 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
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