74FCT3807APYG, Clock Divider CMOS, 1-Input, 20-Pin SSOP
- RS-stocknr.:
- 254-4974
- Fabrikantnummer:
- 74FCT3807APYG
- Fabrikant:
- Renesas Electronics
Subtotaal (1 tube van 64 eenheden)*
€ 67,84
(excl. BTW)
€ 81,92
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Op voorraad
- Plus verzending 512 stuk(s) vanaf 19 december 2025
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per tube* |
|---|---|---|
| 64 + | € 1,06 | € 67,84 |
*prijsindicatie
- RS-stocknr.:
- 254-4974
- Fabrikantnummer:
- 74FCT3807APYG
- Fabrikant:
- Renesas Electronics
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Renesas Electronics | |
| Logic Family | CMOS | |
| Logic Function | Clock Distribution | |
| Input Signal Type | TTL | |
| Output Logic Level | CMOS, TTL | |
| Number of Clock Inputs | 1 | |
| Package Type | SSOP | |
| Pin Count | 20 | |
| Alles selecteren | ||
|---|---|---|
Merk Renesas Electronics | ||
Logic Family CMOS | ||
Logic Function Clock Distribution | ||
Input Signal Type TTL | ||
Output Logic Level CMOS, TTL | ||
Number of Clock Inputs 1 | ||
Package Type SSOP | ||
Pin Count 20 | ||
The Renesas Electronics clock driver is built using advanced dual metal CMOS technology. This low skew clock driver offers 1:10 fanout. The large fanout from a single input reduces loading on the preceding driver and provides an efficient clock distribution network. It offers low capacitance inputs with hysteresis for improved noise margins. Multiple power and grounds reduce noise. Typical applications are clock and signal distribution.
0.5 MICRON CMOS Technology
Guaranteed low skew < 350 ps (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
1:10 fanout
Maximum output rise and fall time < 1.5 ns (max.)
Maximum operating frequency of 133.33 MHz
Low input capacitance: 4.5 pF typical
VCC is 3.3V ± 0.3V
Inputs can be driven from 3.3V or 5V components
Available in SSOP, SOIC, and QSOP packages
Guaranteed low skew < 350 ps (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
1:10 fanout
Maximum output rise and fall time < 1.5 ns (max.)
Maximum operating frequency of 133.33 MHz
Low input capacitance: 4.5 pF typical
VCC is 3.3V ± 0.3V
Inputs can be driven from 3.3V or 5V components
Available in SSOP, SOIC, and QSOP packages
Gerelateerde Links
- 74FCT3807APYG, Clock Divider CMOS, 1-Input, 20-Pin SSOP
- 49FCT3805DPYGI, Clock Divider CMOS, 2-Input, 20-Pin SSOP
- 49FCT3805APYG, Clock Divider CMOS, 2-Input, 20-Pin SSOP
- 49FCT3805APYGI8, Clock Buffer CMOS, 2-Input, 20-Pin SSOP
- 74FCT3807ASOGI, Clock Divider CMOS, 1-Input, 20-Pin SOIC
- 49FCT3805DQGI, Clock Divider CMOS, 2-Input, 20-Pin SOIC
- 74FCT3807AQG, Clock Divider CMOS, 1-Input, 20-Pin QSOP
- 74FCT3807APYGI8, Clock Buffer CMOS, 1-Input, 20-Pin SSOP