Alliance Memory Memory SRAM, CY62256NLL-55SNXI- 2 MB
- RS-stocknr.:
- 286-350
- Fabrikantnummer:
- CY62256NLL-55SNXI
- Fabrikant:
- Alliance Memory
Subtotaal (1 zak van 2 eenheden)*
€ 5,81
(excl. BTW)
€ 7,03
(incl. BTW)
Informatie over voorraden is momenteel niet toegankelijk - Controleer het later nog eens opnieuw
Aantal stuks | Per stuk | Per Zak* |
|---|---|---|
| 2 + | € 2,905 | € 5,81 |
*prijsindicatie
- RS-stocknr.:
- 286-350
- Fabrikantnummer:
- CY62256NLL-55SNXI
- Fabrikant:
- Alliance Memory
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Alliance Memory | |
| Memory Size | 2MB | |
| Product Type | Memory SRAM | |
| Number of Words | 128k | |
| Maximum Random Access Time | 55ns | |
| Minimum Supply Voltage | 4.5V | |
| Timing Type | Asynchronous | |
| Mount Type | Surface | |
| Maximum Supply Voltage | 5.5V | |
| Minimum Operating Temperature | -40°C | |
| Package Type | SOP-28 | |
| Maximum Operating Temperature | 85°C | |
| Pin Count | 28 | |
| Standards/Approvals | RoHS | |
| Series | CY62256NLL | |
| Automotive Standard | No | |
| Supply Current | 50mA | |
| Alles selecteren | ||
|---|---|---|
Merk Alliance Memory | ||
Memory Size 2MB | ||
Product Type Memory SRAM | ||
Number of Words 128k | ||
Maximum Random Access Time 55ns | ||
Minimum Supply Voltage 4.5V | ||
Timing Type Asynchronous | ||
Mount Type Surface | ||
Maximum Supply Voltage 5.5V | ||
Minimum Operating Temperature -40°C | ||
Package Type SOP-28 | ||
Maximum Operating Temperature 85°C | ||
Pin Count 28 | ||
Standards/Approvals RoHS | ||
Series CY62256NLL | ||
Automotive Standard No | ||
Supply Current 50mA | ||
The Alliance Memory CMOS Static RAM is organized as 32K words by 8 bits. It offers easy memory expansion with active LOW chip enable (CE) and output enable (OE), featuring tristate drivers. The device includes an automatic power-down feature that reduces power consumption by 99.9% when deselected. An active LOW write enable signal controls the writing and reading operations. Data is written when CE and WE inputs are both LOW. For reading, the device is selected, and the outputs are enabled while WE remains HIGH. The input or output pins are in a high-impedance state unless the chip is selected, outputs are enabled, and WE is HIGH.
Easy memory expansion with CE and OE features
TTL compatible inputs and outputs
Automatic power down when deselected
CMOS for optimum speed and power