Winbond Mobile LPDDR SDRAM 512 MB Surface, 90-Pin 32 bit VFBGA
- RS-stocknr.:
- 188-2577
- Fabrikantnummer:
- W949D2DBJX5I
- Fabrikant:
- Winbond
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RS heeft dit product niet meer op voorraad.
- RS-stocknr.:
- 188-2577
- Fabrikantnummer:
- W949D2DBJX5I
- Fabrikant:
- Winbond
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
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Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Winbond | |
| Product Type | Mobile LPDDR SDRAM | |
| Memory Size | 512MB | |
| Organisation | 64M x 8 Bit | |
| Data Bus Width | 32bit | |
| Address Bus Width | 15bit | |
| Maximum Clock Frequency | 200MHz | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 5ns | |
| Number of Words | 64M | |
| Mount Type | Surface | |
| Package Type | VFBGA | |
| Pin Count | 90 | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | LVCMOS Compatible | |
| Width | 8.1 mm | |
| Length | 13.1mm | |
| Series | W949D2DB | |
| Height | 0.65mm | |
| Maximum Supply Voltage | 1.95V | |
| Minimum Supply Voltage | 1.7V | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Winbond | ||
Product Type Mobile LPDDR SDRAM | ||
Memory Size 512MB | ||
Organisation 64M x 8 Bit | ||
Data Bus Width 32bit | ||
Address Bus Width 15bit | ||
Maximum Clock Frequency 200MHz | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 5ns | ||
Number of Words 64M | ||
Mount Type Surface | ||
Package Type VFBGA | ||
Pin Count 90 | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals LVCMOS Compatible | ||
Width 8.1 mm | ||
Length 13.1mm | ||
Series W949D2DB | ||
Height 0.65mm | ||
Maximum Supply Voltage 1.95V | ||
Minimum Supply Voltage 1.7V | ||
Automotive Standard No | ||
VDD = 1.7∼1.95V
VDDQ = 1.7∼1.95V
Data width: x16 / x32
Clock rate: 200MHz (-5),166MHz (-6)
Standard Self Refresh Mode
Partial Array Self-Refresh(PASR)
Auto Temperature Compensated Self Refresh (ATCSR)
Power Down Mode
Deep Power Down Mode (DPD Mode)
Programmable output buffer driver strength
Four internal banks for concurrent operation
Data mask (DM) for write data
Clock Stop capability during idle periods
Auto Pre-charge option for each burst access
Double data rate for data output
Differential clock inputs (CK and CK)
Bidirectional, data strobe (DQS)
CAS Latency: 2 and 3
Burst Length: 2, 4, 8 and 16
Burst Type: Sequential or Interleave
8K refresh cycles/64 mS
Interface: LVCMOS compatible
Support package:
60 balls VFBGA (x16)
90 balls VFBGA (x32)
Operating Temperature Range
Extended: -25°C ≤ TCASE ≤ 85°C
Industrial: -40°C ≤ TCASE ≤ 85°C
This is a 512Mb Low Power DDR SDRAM organized as 2M words x 4 banks x 32bits.
Burst Type: Sequential or Interleave
Standard Self Refresh Mode
PASR, ATCSR, Power Down Mode、DPD
Programmable output buffer driver strength
Four internal banks for concurrent operation
Bidirectional, data strobe (DQS) is transmitted or received with data, to be used in capturing data at the receiver
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