ISSI IS43TR16128DL-107MBL-TR SDRAM 128 MB Surface, 96-Pin 16 bit BGA
- RS-stocknr.:
- 648-082
- Fabrikantnummer:
- IS43TR16128DL-107MBL-TR
- Fabrikant:
- ISSI
Subtotaal (1 eenheid)*
€ 3,36
(excl. BTW)
€ 4,07
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 90,00
Op voorraad
- Plus verzending 1.500 stuk(s) vanaf 01 juni 2026
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Aantal stuks | Per stuk |
|---|---|
| 1 + | € 3,36 |
*prijsindicatie
- RS-stocknr.:
- 648-082
- Fabrikantnummer:
- IS43TR16128DL-107MBL-TR
- Fabrikant:
- ISSI
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | ISSI | |
| Memory Size | 128MB | |
| Product Type | SDRAM | |
| Organisation | 128M x 16 bit | |
| Data Bus Width | 16bit | |
| Maximum Clock Frequency | 1066MHz | |
| Mount Type | Surface | |
| Package Type | BGA | |
| Pin Count | 96 | |
| Minimum Operating Temperature | 0°C | |
| Maximum Operating Temperature | 95°C | |
| Standards/Approvals | RoHS | |
| Series | IS43TR16128DL | |
| Supply Current | 85mA | |
| Minimum Supply Voltage | 1.2V | |
| Maximum Supply Voltage | 1.45V | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk ISSI | ||
Memory Size 128MB | ||
Product Type SDRAM | ||
Organisation 128M x 16 bit | ||
Data Bus Width 16bit | ||
Maximum Clock Frequency 1066MHz | ||
Mount Type Surface | ||
Package Type BGA | ||
Pin Count 96 | ||
Minimum Operating Temperature 0°C | ||
Maximum Operating Temperature 95°C | ||
Standards/Approvals RoHS | ||
Series IS43TR16128DL | ||
Supply Current 85mA | ||
Minimum Supply Voltage 1.2V | ||
Maximum Supply Voltage 1.45V | ||
Automotive Standard No | ||
- Land van herkomst:
- TW
The ISSI 2Gb DDR3L SDRAM supports standard voltage of VDD and VDDQ at 1.5V, ± 0.075V and low voltage operation at 1.35V, +0.1V, −0.067V with backward compatibility to 1.5V. It delivers high-speed data transfer with system frequencies up to 1066MHz and features 8 internal banks for concurrent operations. The architecture is based on an 8n-bit prefetch and includes programmable CAS latency, additive latency options of 0 CL−1 or CL−2, and CAS write latency CWL based on tCK. Burst length is programmable to 4 or 8 with selectable burst sequence modes including sequential and interleave.
BL switch on the fly
Auto Self Refresh
Self Refresh Temperature