Alliance Memory AS4C256M16D4A-62BINTR SDRAM 4 GB Surface, 96-Pin 16 bit FBGA-96 Ball
- RS-stocknr.:
- 425-325
- Fabrikantnummer:
- AS4C256M16D4A-62BINTR
- Fabrikant:
- Alliance Memory
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We weten niet of dit item nog op voorraad komt, RS is van plan dit binnenkort uit ons assortiment te halen.
- RS-stocknr.:
- 425-325
- Fabrikantnummer:
- AS4C256M16D4A-62BINTR
- Fabrikant:
- Alliance Memory
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Alliance Memory | |
| Product Type | SDRAM | |
| Memory Size | 4GB | |
| Organisation | 256M x 16 | |
| Data Bus Width | 16bit | |
| Number of Bits per Word | 16 | |
| Maximum Clock Frequency | 1600MHz | |
| Maximum Random Access Time | 18ns | |
| Mount Type | Surface | |
| Package Type | FBGA-96 Ball | |
| Minimum Operating Temperature | -40°C | |
| Pin Count | 96 | |
| Maximum Operating Temperature | 95°C | |
| Standards/Approvals | JEDEC, RoHS | |
| Series | AS4C256M16D4A | |
| Length | 13.5mm | |
| Height | 1.2mm | |
| Width | 7.5 mm | |
| Maximum Supply Voltage | 1.2V | |
| Minimum Supply Voltage | 1.14V | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Alliance Memory | ||
Product Type SDRAM | ||
Memory Size 4GB | ||
Organisation 256M x 16 | ||
Data Bus Width 16bit | ||
Number of Bits per Word 16 | ||
Maximum Clock Frequency 1600MHz | ||
Maximum Random Access Time 18ns | ||
Mount Type Surface | ||
Package Type FBGA-96 Ball | ||
Minimum Operating Temperature -40°C | ||
Pin Count 96 | ||
Maximum Operating Temperature 95°C | ||
Standards/Approvals JEDEC, RoHS | ||
Series AS4C256M16D4A | ||
Length 13.5mm | ||
Height 1.2mm | ||
Width 7.5 mm | ||
Maximum Supply Voltage 1.2V | ||
Minimum Supply Voltage 1.14V | ||
Automotive Standard No | ||
- Land van herkomst:
- TW
The Alliance Memory DDR4 SDRAM is a high-speed dynamic random-access memory internally organized with eight-banks. DDR4 SDRAM uses a 8n prefect architecture to achieve high-speed operation. Operation begins with the registration of an Activate Command, which is then followed by a Read or Write command.
ZQ Calibration
JEDEC Standard Compliant
Write Leveling
RoHS compliant
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