Microchip Physical Layer Transceiver 24-Pin QFN, KSZ8081RNACA
- RS-stocknr.:
- 215-3275
- Fabrikantnummer:
- KSZ8081RNACA
- Fabrikant:
- Microchip
Subtotaal (1 verpakking van 10 eenheden)*
€ 9,89
(excl. BTW)
€ 11,97
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Op voorraad
- 14.450 stuk(s) klaar voor verzending vanaf een andere locatie
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per verpakking* |
|---|---|---|
| 10 + | € 0,989 | € 9,89 |
*prijsindicatie
- RS-stocknr.:
- 215-3275
- Fabrikantnummer:
- KSZ8081RNACA
- Fabrikant:
- Microchip
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Microchip | |
| Typical Data Rate | 100Mbps | |
| Integrated CDR | No | |
| Power Supply Type | Single | |
| Typical Operating Supply Voltage | 3.3 V | |
| JTAG Support | No | |
| Package Type | QFN | |
| Pin Count | 24 | |
| Alles selecteren | ||
|---|---|---|
Merk Microchip | ||
Typical Data Rate 100Mbps | ||
Integrated CDR No | ||
Power Supply Type Single | ||
Typical Operating Supply Voltage 3.3 V | ||
JTAG Support No | ||
Package Type QFN | ||
Pin Count 24 | ||
The Microchip KSZ8081RNA/RND is a single-supply 10BASE-T/100BASE-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. It is a highly-integrated PHY solution. It reduces board cost and simplifies board layout by using on-chip termination resistors for the differential pairs and by integrating a low-noise regulator to supply the 1.2V core, and by offering 1.8/2.5/3.3V digital I/O interface support.
Single-Chip 10BASE-T/100BASE-TX IEEE 802.3
Compliant Ethernet Transceiver
RMII v1.2 Interface Support with a 50 MHz Reference Clock Output to MAC, and an Option to Input a 50 MHz Reference Clock
RMII Back-to-Back Mode Support for a 100 Mbps Copper Repeater
MDC/MDIO Management Interface for PHY Register Configuration
Programmable Interrupt Output
LED Outputs for Link and Activity Status Indication
Compliant Ethernet Transceiver
RMII v1.2 Interface Support with a 50 MHz Reference Clock Output to MAC, and an Option to Input a 50 MHz Reference Clock
RMII Back-to-Back Mode Support for a 100 Mbps Copper Repeater
MDC/MDIO Management Interface for PHY Register Configuration
Programmable Interrupt Output
LED Outputs for Link and Activity Status Indication
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