STMicroelectronics STM32MP233DAJ3, Arm Cortex A35, Arm Cortex M33 Microprocessor STM32 16bit 400MHz 361-Pin TFBGA361
- RS-stocknr.:
- 482-989
- Fabrikantnummer:
- STM32MP233DAJ3
- Fabrikant:
- STMicroelectronics
Afbeelding representeert productcategorie
Bulkkorting beschikbaar
Subtotaal (1 eenheid)*
€ 25,55
(excl. BTW)
€ 30,92
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Tijdelijk niet op voorraad
- Verzending vanaf 15 juni 2026
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Aantal stuks | Per stuk |
|---|---|
| 1 - 4 | € 25,55 |
| 5 + | € 24,78 |
*prijsindicatie
- RS-stocknr.:
- 482-989
- Fabrikantnummer:
- STM32MP233DAJ3
- Fabrikant:
- STMicroelectronics
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | STMicroelectronics | |
| Family Name | STM32 | |
| Device Core | Arm Cortex A35, Arm Cortex M33 | |
| Data Bus Width | 16bit | |
| Maximum Frequency | 400MHz | |
| Package Type | TFBGA361 | |
| Pin Count | 361 | |
| Alles selecteren | ||
|---|---|---|
Merk STMicroelectronics | ||
Family Name STM32 | ||
Device Core Arm Cortex A35, Arm Cortex M33 | ||
Data Bus Width 16bit | ||
Maximum Frequency 400MHz | ||
Package Type TFBGA361 | ||
Pin Count 361 | ||
- Land van herkomst:
- TW
The STMicroelectronics MPU with Dual Arm Cortex-A35 devices are based on the high-performance single or dual-core Arm Cortex-A35 64-bit RISC core operating at up to 1.5 GHz. The Cortex‑A35 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU, and a 512-Kbyte L2 cache. The Cortex‑A35 processor uses a highly efficient 8-stage in-order pipeline that has been extensively optimized to provide full Armv8-A features while maximizing area and power efficiency.
Internal temperature sensors
Low power consumption
Clock management
Digital parallel interface up to 16 bit input or output
Two Octo-SPI memory interfaces
DDR memory retention in Standby mode
Controls for PMIC companion chip
Low power consumption
Clock management
Digital parallel interface up to 16 bit input or output
Two Octo-SPI memory interfaces
DDR memory retention in Standby mode
Controls for PMIC companion chip
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