Infineon, 32bit ARM Cortex M0, CY8C4100 Microcontroller, 48MHz, 128 kB Flash, 64-Pin TQFP

Bekijk alle Microcontrollers

Subtotaal (1 eenheid)*

€ 4,62

(excl. BTW)

€ 5,59

(incl. BTW)

Add to Basket
selecteer of typ hoeveelheid
Op voorraad
  • Plus verzending 180 stuk(s) vanaf 08 december 2025
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks
Per stuk
1 +€ 4,62

*prijsindicatie

Verpakkingsopties
RS-stocknr.:
176-9000
Fabrikantnummer:
CY8C4147AXI-S475
Fabrikant:
Infineon
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren

Merk

Infineon

Family Name

CY8C4100

Package Type

TQFP

Mounting Type

Surface Mount

Pin Count

64

Device Core

ARM Cortex M0

Data Bus Width

32bit

Program Memory Size

128 kB

Maximum Frequency

48MHz

RAM Size

16 kB

USB Channels

0

Number of PWM Units

1 x 16 bit

Number of SPI Channels

5

Number of UART Channels

5

Number of I2C Channels

5

Typical Operating Supply Voltage

1.8 → 5.5 V

Number of CAN Channels

1

Number of USART Channels

0

Number of PCI Channels

0

Pulse Width Modulation

1 (8 x 16 bit)

Number of LIN Channels

0

Height

1.45mm

Dimensions

14.05 x 14.05 x 1.45mm

Width

14.05mm

Maximum Operating Temperature

+85 °C

Length

14.05mm

ADCs

2 x 10/12 bit

Maximum Number of Ethernet Channels

0

Instruction Set Architecture

Thumb-2

Minimum Operating Temperature

-40 °C

Program Memory Type

Flash

Number of Ethernet Channels

0

Number of ADC Units

1

PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4200_BL product family, based on this platform, is a combination of a microcontroller with an integrated Bluetooth Low Energy (BLE), also known as Bluetooth Smart, radio and subsystem (BLESS).

Four opamps with reconfigurable high-drive external and high-bandwidth internal drive, Comparator modes, and ADC input buffering capability Can operate in Deep Sleep mode.
Four programmable logic blocks called universal digital blocks, (UDBs), each with eight macrocells and data path
Cypress-provided peripheral component library, user-defined state machines, and Verilog input
Power Management:
Active mode: 1.7 mA at 3-MHz flash program execution
Deep Sleep mode: 1.5 μA with watch crystal oscillator

Gerelateerde Links