Microchip, 8bit 8 bit MCU, PIC18F46Q84 Microcontroller, 64MHz, 64 kb Flash, 44-Pin TQFP
- RS-stocknr.:
- 631-518
- Fabrikantnummer:
- PIC18F46Q84-E/PTVAO
- Fabrikant:
- Microchip
Subtotaal (1 doos van 480 eenheden)*
€ 905,28
(excl. BTW)
€ 1.095,36
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Tijdelijk niet op voorraad
- Verzending vanaf 14 januari 2026
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per Doos* |
|---|---|---|
| 480 + | € 1,886 | € 905,28 |
*prijsindicatie
- RS-stocknr.:
- 631-518
- Fabrikantnummer:
- PIC18F46Q84-E/PTVAO
- Fabrikant:
- Microchip
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Microchip | |
| Family Name | PIC18F46Q84 | |
| Package Type | TQFP | |
| Mounting Type | Surface Mount | |
| Pin Count | 44 | |
| Device Core | 8 bit MCU | |
| Data Bus Width | 8bit | |
| Program Memory Size | 64 kb | |
| Maximum Frequency | 64MHz | |
| Program Memory Type | Flash | |
| Alles selecteren | ||
|---|---|---|
Merk Microchip | ||
Family Name PIC18F46Q84 | ||
Package Type TQFP | ||
Mounting Type Surface Mount | ||
Pin Count 44 | ||
Device Core 8 bit MCU | ||
Data Bus Width 8bit | ||
Program Memory Size 64 kb | ||
Maximum Frequency 64MHz | ||
Program Memory Type Flash | ||
- Land van herkomst:
- TH
The Microchip 8 bit MCUs expands by combining an extensive array of Core Independent Peripherals (CIPs) with Controller Area Network Flexible Data Rate (CAN FD). These cost optimized MCUs contain time-saving CIPs in up to 48-pins with up to 128 KB of flash memory. The family introduces new features and peripherals like the Universal Timer (UTMR) with customization capability
context switching added to the 12-bit ADC with Computation for automating analogue signal analysis for real-time system response.
Data transfers capabilities
User programmable source and destination sizes
Hardware and software triggered data transfers
Fixed interrupt latency of three instruction cycles
Programmable vector table base address
Backwards compatible with previous interrupt capabilities
User programmable source and destination sizes
Hardware and software triggered data transfers
Fixed interrupt latency of three instruction cycles
Programmable vector table base address
Backwards compatible with previous interrupt capabilities
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