Toshiba 74VHCT32AFT, Quad 2-Input OR Logic Gate, 14-Pin TSSOP
- RS-stocknr.:
- 171-3365
- Fabrikantnummer:
- 74VHCT32AFT
- Fabrikant:
- Toshiba
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We weten niet of dit item nog op voorraad komt, RS is van plan dit binnenkort uit ons assortiment te halen.
- RS-stocknr.:
- 171-3365
- Fabrikantnummer:
- 74VHCT32AFT
- Fabrikant:
- Toshiba
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
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Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Toshiba | |
| Logic Function | OR | |
| Mounting Type | Surface Mount | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Package Type | TSSOP | |
| Pin Count | 14 | |
| Logic Family | 74VHCT | |
| Input Type | CMOS, TTL | |
| Maximum Operating Supply Voltage | 5.5 V | |
| Maximum High Level Output Current | -8mA | |
| Maximum Propagation Delay Time @ Maximum CL | 9.5 ns @ 50 pF | |
| Minimum Operating Supply Voltage | 4.5 V | |
| Maximum Low Level Output Current | 8mA | |
| Width | 4.4mm | |
| Height | 1mm | |
| Dimensions | 5 x 4.4 x 1mm | |
| Minimum Operating Temperature | -40 °C | |
| Length | 5mm | |
| Automotive Standard | AEC-Q100 | |
| Maximum Operating Temperature | +125 °C | |
| Propagation Delay Test Condition | 50pF | |
| Alles selecteren | ||
|---|---|---|
Merk Toshiba | ||
Logic Function OR | ||
Mounting Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Package Type TSSOP | ||
Pin Count 14 | ||
Logic Family 74VHCT | ||
Input Type CMOS, TTL | ||
Maximum Operating Supply Voltage 5.5 V | ||
Maximum High Level Output Current -8mA | ||
Maximum Propagation Delay Time @ Maximum CL 9.5 ns @ 50 pF | ||
Minimum Operating Supply Voltage 4.5 V | ||
Maximum Low Level Output Current 8mA | ||
Width 4.4mm | ||
Height 1mm | ||
Dimensions 5 x 4.4 x 1mm | ||
Minimum Operating Temperature -40 °C | ||
Length 5mm | ||
Automotive Standard AEC-Q100 | ||
Maximum Operating Temperature +125 °C | ||
Propagation Delay Test Condition 50pF | ||
The 74VHCT32AFT is an advanced high speed CMOS 2-INPUT OR GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including buffer output, which provide high noise immunity and stable output. The input voltage are compatible with TTL output voltage. This device may be used as a level converter for interfacing 3.3 V to 5 V system. Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without regard to the supply voltage. These structure prevents device destruction due to mismatched supply and input/output voltages such as battery back up, hot board insertion, etc.
Wide operating temperature range: Topr = -40 to 125
High speed: tpd = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Compatible with TTL inputs : VIL = 0.8 V (max): VIH = 2.0 V (min)
Power down protection is provided on all inputs and outputs.
Balanced propagation delays: tPLH ≈ tPHL
Low noise: VOLP = 1.0 V (max)
Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 245 type
High speed: tpd = 3.8 ns (typ.) at VCC = 5.0 V
Low power dissipation: ICC = 2.0 μA (max) at Ta = 25
Compatible with TTL inputs : VIL = 0.8 V (max): VIH = 2.0 V (min)
Power down protection is provided on all inputs and outputs.
Balanced propagation delays: tPLH ≈ tPHL
Low noise: VOLP = 1.0 V (max)
Pin and function compatible with the 74 series (AC/HC/AHC/LV etc.) 245 type