Nexperia 74LVC00APW,118, Quad 2-Input NAND Schmitt Trigger Logic Gate, 14-Pin TSSOP
- RS-stocknr.:
- 170-8012
- Fabrikantnummer:
- 74LVC00APW,118
- Fabrikant:
- Nexperia
Subtotaal (1 rol van 2500 eenheden)*
€ 367,50
(excl. BTW)
€ 445,00
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Tijdelijk niet op voorraad
- Verzending vanaf 16 juni 2026
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per rol* |
|---|---|---|
| 2500 + | € 0,147 | € 367,50 |
*prijsindicatie
- RS-stocknr.:
- 170-8012
- Fabrikantnummer:
- 74LVC00APW,118
- Fabrikant:
- Nexperia
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Nexperia | |
| Logic Function | NAND | |
| Mounting Type | Surface Mount | |
| Number of Elements | 4 | |
| Number of Inputs per Gate | 2 | |
| Schmitt Trigger Input | Yes | |
| Package Type | TSSOP | |
| Pin Count | 14 | |
| Logic Family | 74LVC | |
| Input Type | Schmitt Trigger | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Maximum High Level Output Current | -24mA | |
| Maximum Propagation Delay Time @ Maximum CL | 9.7 ns @ 50 pF | |
| Minimum Operating Supply Voltage | 1.2 V | |
| Maximum Low Level Output Current | 24mA | |
| Width | 4.5mm | |
| Dimensions | 5.1 x 4.5 x 0.95mm | |
| Minimum Operating Temperature | -40 °C | |
| Height | 0.95mm | |
| Propagation Delay Test Condition | 50pF | |
| Output Type | Single Ended | |
| Maximum Operating Temperature | +125 °C | |
| Length | 5.1mm | |
| Alles selecteren | ||
|---|---|---|
Merk Nexperia | ||
Logic Function NAND | ||
Mounting Type Surface Mount | ||
Number of Elements 4 | ||
Number of Inputs per Gate 2 | ||
Schmitt Trigger Input Yes | ||
Package Type TSSOP | ||
Pin Count 14 | ||
Logic Family 74LVC | ||
Input Type Schmitt Trigger | ||
Maximum Operating Supply Voltage 3.6 V | ||
Maximum High Level Output Current -24mA | ||
Maximum Propagation Delay Time @ Maximum CL 9.7 ns @ 50 pF | ||
Minimum Operating Supply Voltage 1.2 V | ||
Maximum Low Level Output Current 24mA | ||
Width 4.5mm | ||
Dimensions 5.1 x 4.5 x 0.95mm | ||
Minimum Operating Temperature -40 °C | ||
Height 0.95mm | ||
Propagation Delay Test Condition 50pF | ||
Output Type Single Ended | ||
Maximum Operating Temperature +125 °C | ||
Length 5.1mm | ||
The 74LVC00A provides four 2-input NAND gates. Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V applications.
Key features and benefits
Mixed 5 V and 3.3 V applications
Reduce time to market for complex designs
Save board space
Open-drain output options
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant options
Low input threshold options
CMOS low power
Mixed 5 V and 3.3 V applications
Reduce time to market for complex designs
Save board space
Open-drain output options
Improved signal integrity for complex layouts
Wide supply voltage range
Low propagation delay
Overvoltage tolerant options
Low input threshold options
CMOS low power
74LVC Family
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