Lattice FPGA iCE40 3520 Cells, 80000 bit 440 Blocks, 144-Pin TQFP
- RS-stocknr.:
- 772-0057P
- Fabrikantnummer:
- iCE40HX4K-TQ144
- Fabrikant:
- Lattice Semiconductor
Subtotaal 1 eenheid (geleverd op een tray)*
€ 7,48
(excl. BTW)
€ 9,05
(incl. BTW)
Informatie over voorraden is momenteel niet toegankelijk - Controleer het later nog eens opnieuw
Aantal stuks | Per stuk |
|---|---|
| 1 + | € 7,48 |
*prijsindicatie
- RS-stocknr.:
- 772-0057P
- Fabrikantnummer:
- iCE40HX4K-TQ144
- Fabrikant:
- Lattice Semiconductor
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Lattice Semiconductor | |
| Product Type | FPGA | |
| Series | iCE40 | |
| Number of Logic Cells | 3520 | |
| Number of Logic Units | 440 | |
| Number of Registers | 3520 | |
| Mount Type | Surface | |
| Package Type | TQFP | |
| Minimum Supply Voltage | 1.14V | |
| Maximum Supply Voltage | 1.26V | |
| Pin Count | 144 | |
| Minimum Operating Temperature | -40°C | |
| Number of RAM Bits | 80000bit | |
| Maximum Operating Temperature | 85°C | |
| Length | 20mm | |
| Standards/Approvals | No | |
| Height | 1.45mm | |
| Automotive Standard | No | |
| Alles selecteren | ||
|---|---|---|
Merk Lattice Semiconductor | ||
Product Type FPGA | ||
Series iCE40 | ||
Number of Logic Cells 3520 | ||
Number of Logic Units 440 | ||
Number of Registers 3520 | ||
Mount Type Surface | ||
Package Type TQFP | ||
Minimum Supply Voltage 1.14V | ||
Maximum Supply Voltage 1.26V | ||
Pin Count 144 | ||
Minimum Operating Temperature -40°C | ||
Number of RAM Bits 80000bit | ||
Maximum Operating Temperature 85°C | ||
Length 20mm | ||
Standards/Approvals No | ||
Height 1.45mm | ||
Automotive Standard No | ||
Field Programmable Gate Arrays, Lattice Semiconductor
An FPGA is a semiconductor device consisting of a Matrix of Configurable Logic Blocks (CLBs) connected through programmable interconnects. The user determines these interconnections by programming SRAM. A CLB can be simple (AND, OR gates, etc) or complex (a Block of RAM). The FPGA allows changes to be MADE to a design even after the device is soldered into a PCB.