Infineon NOR 512 MB SPI Flash Memory 8-Pin, S25HL512TFAMHI010
- RS-stocknr.:
- 273-5425
- Fabrikantnummer:
- S25HL512TFAMHI010
- Fabrikant:
- Infineon
Subtotaal (1 tray van 240 eenheden)*
€ 1.826,64
(excl. BTW)
€ 2.210,16
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Tijdelijk niet op voorraad
- Verzending vanaf 27 april 2026
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks | Per stuk | Per tray* |
|---|---|---|
| 240 + | € 7,611 | € 1.826,64 |
*prijsindicatie
- RS-stocknr.:
- 273-5425
- Fabrikantnummer:
- S25HL512TFAMHI010
- Fabrikant:
- Infineon
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Infineon | |
| Memory Size | 512MB | |
| Product Type | Flash Memory | |
| Interface Type | SPI | |
| Pin Count | 8 | |
| Maximum Clock Frequency | 166MHz | |
| Cell Type | NOR | |
| Minimum Supply Voltage | 1.7V | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | -40°C | |
| Standards/Approvals | ISO26262 ASIL B and ASIL D ready | |
| Series | SEMPER Flash | |
| Supply Current | 53mA | |
| Automotive Standard | AEC-Q1 Grade 1 | |
| Alles selecteren | ||
|---|---|---|
Merk Infineon | ||
Memory Size 512MB | ||
Product Type Flash Memory | ||
Interface Type SPI | ||
Pin Count 8 | ||
Maximum Clock Frequency 166MHz | ||
Cell Type NOR | ||
Minimum Supply Voltage 1.7V | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature -40°C | ||
Standards/Approvals ISO26262 ASIL B and ASIL D ready | ||
Series SEMPER Flash | ||
Supply Current 53mA | ||
Automotive Standard AEC-Q1 Grade 1 | ||
The Infineon Flash Memory is a Quad SPI family of products which has high speed CMOS, MIRRORBIT™ NOR Flash devices. This flash memory is designed for functional safety with development according to ISO 26262 standard to achieve ASIL B compliance and ASIL D readiness. Read operations from the device are burst oriented. Read transactions can be configured to use either a wrapped or linear burst. Wrapped bursts read from a single page whereas linear bursts can read the whole memory array.
Legacy Block protection
SDR option runs up to 21 MBps
OTP secure silicon array of 1024 bytes
Serial flash discoverable parameters
Minimum 100000 program and erase cycles
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