dsPIC30F5013-30I/PT Microchip dsPIC30F, 16bit Digital Signal Processor 30MIPS 1.024 kB, 66 kB Flash 80-Pin TQFP

Bekijk deze categorie

Subtotaal (1 tray van 119 eenheden)*

€ 1.088,136

(excl. BTW)

€ 1.316,616

(incl. BTW)

Add to Basket
selecteer of typ hoeveelheid
Op voorraad
  • 119 stuk(s) klaar voor verzending vanaf een andere locatie
Heeft u meer nodig? Klik op 'Controleer leverdata' voor extra voorraad en levertijden.
Aantal stuks
Per stuk
Per tray*
119 +€ 9,144€ 1.088,14

*prijsindicatie

RS-stocknr.:
889-5714
Fabrikantnummer:
dsPIC30F5013-30I/PT
Fabrikant:
Microchip
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren

Merk

Microchip

Maximum Frequency

30MIPS

Series

dsPIC30F

Device Million Instructions per Second

30MIPS

Data Bus Width

16bit

RAM Size

4.096 kB

Instruction Set Architecture

RISC

Program Memory Size

1.024 kB, 66 kB

Program Memory Type

Flash

Mounting Type

Surface Mount

Package Type

TQFP

Pin Count

80

Typical Operating Supply Voltage

2.5 to 5.5 V

Number of UART Channels

2

Pulse Width Modulation

5(16 bit)

Number of USART Channels

0

Timers

5 x 16 bit

Dimensions

12 x 12 x 1.05mm

Number of PCI Channels

0

Number of I2C Channels

1

Number of Timers

5

Number of Ethernet Channels

0

Number of SPI Channels

2

USB Channels

0

ADCs

16 x 12 bit

Length

12mm

Width

12mm

Maximum Operating Temperature

+85 °C

Number of ADC Units

1

ADC Channels

16

Number of CAN Channels

2

PWM Resolution

16bit

Timer Resolution

16bit

Height

1.05mm

Number of LIN Channels

0

Number of PWM Units

5

ADC Resolution

12bit

Minimum Operating Temperature

-40 °C

Land van herkomst:
TH

dsPIC30F5011/5013 16-Bit Digital Signal Controllers


Microchip’s dsPIC30F family of Digital Signal Controllers (DSCs) offer designers DSP like performance with the simplicity of an MCU. The dsPIC30F5011/5013 devices are general purpose DSCs that feature peripherals suitable for a variety of different applications.

CPU Features


30 MIPS Max. CPU Speed
Modified Harvard architecture
C compiler optimized instruction set architecture
83 base instructions with flexible addressing modes
24-bit wide instructions, 16-bit wide data path
66 Kbytes on-chip Flash program space
4 Kbytes of on-chip data RAM
1 Kbyte of non-volatile data EEPROM
16 x 16-bit working register array
Up to 41 interrupt sources

DSP Engine Features


Modulo and Bit-Reversed modes
Two 40-bit wide accumulators with optional saturation logic
17-bit x 17-bit single-cycle hardware fractional/integer multiplier
All DSP instructions are single cycle - Multiply-Accumulate (MAC) operation
Single cycle ±16 shift Dual data fetch

Peripheral Features


High-current sink/source I/O pins: 25 mA/25 mA
Five 16-bit timers/counters – option to pair up 16-bit timers into 32-bit timer modules
One 16-bit Capture input functions
Two 16-bit Compare/PWM output functions
Data Converter Interface (DCI) supports common audio codec protocols, including I2S and AC’97
PWM generators with 8 outputs
12-Bit 200 ksps Analogue-to-Digital Converter (ADC) – 16 Channels
3-wire SPI modules
I2CTM module
Two UART Modules
Two CAN bus Modules

Gerelateerde Links