Microchip DSPIC33CH128MP506-I/MR, Microprocessor dsPIC33CH 16bit DSP, MCU 180 MHz, 200 MHz 64-Pin QFN
- RS-stocknr.:
- 175-7219P
- Fabrikantnummer:
- DSPIC33CH128MP506-I/MR
- Fabrikant:
- Microchip
Subtotaal 2 eenheden (geleverd in een buis)*
€ 4,68
(excl. BTW)
€ 5,66
(incl. BTW)
GRATIS bezorging voor bestellingen vanaf € 75,00
Wordt opgeheven
- Laatste 10 stuk(s), klaar voor verzending vanaf een andere locatie
Aantal stuks | Per stuk |
|---|---|
| 2 + | € 2,34 |
*prijsindicatie
- RS-stocknr.:
- 175-7219P
- Fabrikantnummer:
- DSPIC33CH128MP506-I/MR
- Fabrikant:
- Microchip
Specificaties
Datasheets
Wetgeving en conformiteit
Productomschrijving
Zoek vergelijkbare producten door een of meer kenmerken te selecteren.
Alles selecteren | Attribuut | Waarde |
|---|---|---|
| Merk | Microchip | |
| Family Name | dsPIC33CH | |
| Data Bus Width | 16bit | |
| Instruction Set Architecture | DSP, MCU | |
| Maximum Frequency | 180 MHz, 200 MHz | |
| Fabrication Technology | CMOS | |
| Mounting Type | Surface Mount | |
| Package Type | QFN | |
| Pin Count | 64 | |
| Typical Operating Supply Voltage | 3 → 3.6 V | |
| Dimensions | 9 x 9 x 0.95mm | |
| Maximum Operating Temperature | +85 °C | |
| Minimum Operating Temperature | -40 °C | |
| Alles selecteren | ||
|---|---|---|
Merk Microchip | ||
Family Name dsPIC33CH | ||
Data Bus Width 16bit | ||
Instruction Set Architecture DSP, MCU | ||
Maximum Frequency 180 MHz, 200 MHz | ||
Fabrication Technology CMOS | ||
Mounting Type Surface Mount | ||
Package Type QFN | ||
Pin Count 64 | ||
Typical Operating Supply Voltage 3 → 3.6 V | ||
Dimensions 9 x 9 x 0.95mm | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Temperature -40 °C | ||
System developers designing high-end embedded control applications can benefit from a new Digital Signal Controller (DSC) with two dsPIC DSC cores in a single chip. The dsPIC33CH has one core that is designed to function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions, customized for the end application.
Operating Conditions
3V to 3.6V, -40°C to +125°C
Core: Dual 16-Bit dsPIC33CH CPUs
Master Core 90 MIPS and Slave Core 100 MIPS Operation
Independent Peripherals for Master Core and Slave Core
Configurable Shared Resources for Master Core and Slave Core
Programmable PLLs and Oscillator Clock Sources
Fast Wake-up and Start-up
Backup Internal Oscillator
Low-Power Management Modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
Debugger Development Support
3V to 3.6V, -40°C to +125°C
Core: Dual 16-Bit dsPIC33CH CPUs
Master Core 90 MIPS and Slave Core 100 MIPS Operation
Independent Peripherals for Master Core and Slave Core
Configurable Shared Resources for Master Core and Slave Core
Programmable PLLs and Oscillator Clock Sources
Fast Wake-up and Start-up
Backup Internal Oscillator
Low-Power Management Modes (Sleep, Idle, Doze)
Integrated Power-on Reset and Brown-out Reset
Debugger Development Support